Want to own ADC IP? Enroll to this weekend HDP cohort
Published: Fri, 01/21/22
Hi Every semiconductor engineer has a dream to own at least one IP. Here's a unique chance to get hands-on one fully opensource ADC IP using sky130,…
VLSI System Design
Join our mailing list to stay updated on the latest and most advanced VLSI & RISC-V programs. Dive into cutting-edge courses, gain hands-on experience, and transform your career with industry-leading expertise. Stay ahead in the tech world and be part of a community that's driving innovation and excellence in VLSI & RISC-V!
Tapeout Program completes with STA workshop after 11 years
Published: Mon, 01/17/22
Hi It takes time to build anything great. We did run into obstacles, but quality of perseverance overcomes almost everything Building content for the…
1-day left for next design verification hdp cohort
Published: Fri, 01/14/22
Hi This is a gentle reminder regarding Jan 16 VSD-HDP cohort on design verification. This is one of its kind "project based trainings", where you…
QnA - RISC-V vector core Verilator Verification HDP
Published: Wed, 01/12/22
Hi After previous detailed blog about Verilator based Verification HDP for RISC-V vector core, there were many questions which come up and most…
VSD-HDP : Verilator Verification Environment for RISC-V vector accelerator
Published: Mon, 01/10/22
Hi Now this is how VSD wants to approach design verification - Something new, something e citing, something never done before - Probably, if you are…
Stats for VSD2021
Published: Thu, 01/06/22
Hi Finally, here are the stats for VSD2021 Thank You Everyone who were directly or indirectly involved in helping VSD. If you are reading this and…
2021 and VSD-HDP registration - Closes in 24hrs
Published: Thu, 12/30/21
Hi Summarizing all projects in this image Jot down your project goals from this link by year end within ne t 24hours and start e ecuting from very 1st…
Exclusive VSD-HDP on Deep Learning - Last 3days
Published: Wed, 12/29/21
Hi While we are connected to our past, we are also getting ready for the future. FPGA and ASIC circuits are being worked on and the RTL development…
[Last 5 days] - Exclusive Scripting HDP for freshers/working professionals
Published: Sun, 12/26/21
Hi Believe it or not, scripting and programming has been a pain point for so many years among 80% of freshers and working professionals. It's time to…
[Last 6days] - Exclusive HDP on multi-corner STA using sky130
Published: Sat, 12/25/21
Hi VSD has done close to 20 chip tapeouts with 130nm from Skywater technology, but being a core STA engineer, there is one major thing that's missing…