I am amazed by this SKY130 STA analysis results from a fresher
Published: Sat, 06/04/22
Hi Hopefully, all of you are attending today evening's webinar. Attaching a snippet of the results summary which was documented as a part of the VSD-…
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SKY130 PLL noise analysis webinar starts now
Published: Thu, 06/02/22
Hi Gentle reminder - PLL noise Analysis Webinar starts now https://us02web.zoom.us/j/84439956632?pwd=dVBqTTVQWjlySFlCNjVENlpvOGFCdz09 Thanks
VSD-HDP - SKY130 Noise and Timing - Free Webinars
Published: Tue, 05/31/22
Hi As you all might be aware, VSD-HDP is planned along the lines of real problem statements related to tools, PDKs, IPs, and SoCs. When we launched…
Finally, last workshop, last day - OpenFPGA
Published: Sun, 05/29/22
Hi Finally we reach the end of series - We have one final workshop to go - FPGA – Fabric, Design and Arch. Workshop registration closes in 15hrs and…
FPGA and OpenFPGA - The early bird catches the worm
Published: Fri, 05/27/22
Hi Have you heard of the quote - "The early bird catches the worm" It just means that one who arrives first has the best chance of success. Similarly,…
RISC-V launched, FPGA and OpenFPGA next
Published: Wed, 05/25/22
Hi Happy to inform you that we launched Course 1 - RISC-V workshop a few hours back. Received an amazing response Ne t is Mi ed-Signal FPGA which is a…
RISC-V workshop starting soon
Published: Sun, 05/22/22
Hi Did you know the best part of learning computer architecture? You can build a basic CPU using mu es, which you have learnt as a part of digital…
Mission OSFPGA 3-8-10
Published: Fri, 05/20/22
Hi Does this sound like an Army mission with a secret code number? No, it's not. So what is "Mission OSFPGA 3-8-10"? It is a creative way to remind…
From 2-input mux to RISC-V to FPGA - All in 2 weeks
Published: Thu, 05/19/22
Hi Ever wondered what all you can do in 2-weeks? You can build your RISC-V CPU core. You can interface your RISC-V CPU with an analog block and test…
Upcoming OSFPGA workshop FAQs
Published: Tue, 05/17/22
Hi There have been many queries by you about content which we are planning to cover in the upcoming "RISC-V on FPGA" workshop organized by the OSFPGA…