VSD-HDP - SKY130 Noise and Timing

VSD-HDP - SKY130 Noise and Timing - Free Webinars

Published: Tue, 05/31/22

As you all might be aware, VSD-HDP is planned along the lines of real problem statements related to tools, PDKs, IPs, and SoCs. When we launched VSD-HDP a few years back, the purpose was to start building open source analog IPs which are usable, at least for simulations. Today, we have 25+ IPs which are silicon ready and 150+ IPs which are at the post-layout simulation phase.

The new series of VSD-HDPs were planned to analyze PDKs and IPs in terms of noise and timing across all PVT corners. And that's exactly was the output of 2 HDP participants and they came up with amazing findings, which can be used for further analysis of SKY130 PDKs

Webinar Name 1 - PLL Noise Analysis using SKY130 and ngspice
VSD Intern name - Akshay Kulkarni
Date - 2 June 2022, 8 pm to 9 pm IST

Webinar Name 2 - Performance characterization for RISCV-core using SKY130 and OpenSTA
VSD Intern name - Geetima Kachari
Date - 4 June 2022, 8 pm to 9 pm IST

Here's the link to register:

https://www.vlsisystemdesign.com/vsd-intern-free-webinar/

All the best and happy learning

Thanks & Regards

Kunal P Ghosh

"A pessimist always sees difficulty in every opportunity, An optimist always sees opportunity in every difficulty"