Hi
Does the above image looks familiar? It’s a snippet from STA-2 pre-launched course ‘Interface Analysis’ section….I have seen in my career, people worrying a lot of interface
constraints, and the reason for that is simple, there are tons of combinations of IO.
Well, I have classified this into 5 most common cases and made it very easy. Have a look!! The videos for interface analysis and other topics are getting uploaded as I write this email….
Also, this is to inform you that this email is my fourth and last pre-launch offer for STA-2 pre-launched course. Now
the course is available at pre-launch of $13, and that’s it…. Next time, it will be offered at standard rates which me and Udemy follows for my other course i.e. $19 and above…
So get in soon and take advantage of pre-launch $13 offer, not only for this course, but for all my other courses as well…This $13 offer is valid till 13th Dec i.e till tomorrow mid-night 11:59pm IST.. Below is the link for STA-1 and
STA-2 course:
Static timing analysis – Part 2:
Static timing analysis – Part 1:
And here are links for all other courses….
Custom layout:
Clock tree synthesis – Part 1:
Clock tree synthesis – Part 2:
Circuit design and SPICE simulations – Part 1:
Circuit design and SPICE simulations – Part
2:
Physical design flow: (Keep an eye on this one as the following course for this one will be announced soon)
Signal integrity:
VLSI – Essential concepts and detailed interview
guide:
“Opportunities neglected can never be recovered”
Do not neglect this one …. Happy Learning !!!
