Wasn't that a smartest way to implement layout? And I guarantee you, you take the toughest design, break into smaller logic, build each logic using euler's path and stick diagram, and connect each layout back....you will get the most optimized layout in terms of area and power. Guess what you need to do to increase the performance....just increase
width of p-diff/n-diff and make it low resistance path to VDD and GND... This is what my STA friends call as 'sizing'..
How cool is that? Your STA is somehow related to the concepts about euler's path and stick diagram we just talked about in above and previous 2 blogs ....
And as Alvin Toffler very rightly said : "You've got to think about big things while you're doing small things, so that all small things go in right
direction"
So think big .... and take small steps to achieve it....
Till then ... happy learning .... Also, find all my courses taught in above similar way in below link (there's a black friday deal going on ... so hurry):
https://www.udemy.com/user/anagha/