As I mentioned in all my previous emails, this time VSDOpen2021 is dedicated only for VLSI and Semiconductor freshers.
VSDOpen2021 Second Tutorial invites (again) freshers only (strictly freshers) who are looking to learn Digital Design using Verilog from scratch and test it on a virtual FPGA board. What does it mean? We all write Verilog codes. But have we (freshers) ever tested it on hardware? At-least, I didn't have that opportunity in my college. But now,
we have a visualization of an FPGA board on cloud, where you can test your verilog code. Testing is something which makes Verilog coding super cool
Experts - Feel free to join to encourage freshers and look at our internship cum workshop model
Technical Overview:
This course will be an in-depth hands-on demo session on the Virtual FPGA Lab using the open-source Makerchip IDE Web platform. The course will start with the introduction of why we need Virtual FPGA Lab and going through the GitHub repository. Then we will introduce the participants to Verilog. Theory is useful, but nothing beats practice!! We will design a 4-way traffic light controller using the
concept of Finite State Machines in Verilog. We then visualize the output with LEDs and seven-segment displays in the Makerchip Virtual FPGA platform. Every part of this course has a theory followed by a lab.The student is required to have just a basic understanding of logic gates and no knowledge of the EDA tools is required.
Course Curriculum:
Features - Low cost ($10), 1-day, cloud lab based workshop
Timings - You can login at your own convenient time during 24-hrs duration of the workshop and start with lectures/labs at your own pace
Workshop Start date - 19th October, 11:59pm IST
Workshop End date - 20th October, 11:59pm IST
Registration link-
Indian Participants-
https://pages.razorpay.com/fgpainr
International Participants-
https://pages.razorpay.com/vsdopenfgpa
All the best and happy learning
