If you have seen the above image, which is a snippet of a list of IPs built by VSD interns and students, one strong reason behind successfully building IPs was CMOS circuit design fundamentals. You all must have also seen various successful placement stories of VSD students. Reason - They were good with CMOS circuit design fundamentals. Finally, you must have also seen successful GitHub repos of VSD workshop participants
on VSD certificates. Everyone doesn't get a completion certificate unless they cover all labs and every lab has a bit of CMOS fundamentals.
In short, there is no escape to CMOS circuit design and spice simulations. You go for Physical design interviews - you need CMOS. You go for low power design interviews - you need CMOS. You go for an STA interview, you would need CMOS. You go for layout interviews, you need CMOS. A good interviewer keeps 90% of the interview on CMOS circuit design, especially for freshers. So let's get this done from this workshop. You will be surprised to see
in labs how varying voltages across devices impacts device characteristics.
Registration for this workshop closes in 48 hours. Here's the link with details.
All the best and happy learning
