Last 6 hours for HDP on vsdsram and RISC-V for NMOS modelling

Published: Thu, 07/15/21

While all project are being taken up, 2 high visibility and possibly tape-out based ASIC projects are open to fill. In case you are interested, we have last 6 hours for 10-weeks hardware design program registration

Here's the link:

https://www.vlsisystemdesign.com/hdp/

Participants who have already registered, we will get back to you with 1-to-1 meeting details with your mentors

All the best and give your 100%

Thanks