RTL design and synthesis using Verilog with SKY130 Technology, 26 - 30 May, 2021
|
Frequently Asked Questions
|
What are the registration fees?
|
It is discounted to $70 ($199) as we want everyone to have access to Open-source EDA tools and PDK's for college projects,
PhD, Semester Lectures, and latest industry trends
|
Can I join at my convenient time?
|
Yes. The workshop is conducted on VSD-IAT cloud platform, which allows you to login at your convenient time within 24hrs from
May 26, 00:00hrs IST to May 30, 11:59pm IST
|
I am a 2nd year engineering student. Can I join this
workshop?
|
In our last RISC-V workshop, we
had students as young as 8th Grade. So, if you are looking forward to learning something new and making a bright career in the field of VLSI, you are welcome. This workshop, though it is called advanced, is kept at a considerably basic level, where we make sure basics are covered first. Look at curriculum in above registration link
|
Can experienced system designers join for refreshing
concepts?
|
We would suggest you refrain
from joining this workshop, as it is especially designed only for freshers looking to start in the field of VLSI. But, if you are looking to share your RTL Design experience with students, then you are more than welcome to join. Also, as per experience, many professionals learned something new in our workshops, which was then applied in their own work for job change or profile change. If you are someone looking for a profile or job change, you are most welcome to join
|
Do I need to install any software or tools to do labs?
|
No. Labs will be done on
VSD-IAT cloud platform. You will be given access to a Linux Terminal, which has all necessary tools installed. Post workshop, we will provide scripts to install all tools on your laptops so you can do all experiments on your laptop and revise
|
Can I access content after Workshop is finished ?
|
Access to videos and VSD-IAT
platform will terminate on last day of Workshop. Just like our previous workshops, we encourage you to take snapshots of labs and create GitHub report, which you can use in future for your own reference
|
|
|
|