3 DAYS TO GO - LAST 30 SEATS - Enabling multicore testbenches

Published: Wed, 06/12/19

Limited on-chip RAM is being shared by all processor cores and hence running multiple simulations on a multicore server is no longer an option

Embedded UVM is currently the only UVM implementation that enables multicore testbench simulations
Embedded UVM is optimized for multicore processors with each verification IP running on a parallel thread
Embedded UVM simulates the testbench on separate threads running parallel to the design simulation

Looking into the future, here we are - So join webinar on "Opensource Verification and Emulation using Embedded UVM" on 15th June'2019 and grab recordings & one of my online courses for FREE.

Here's the link: (Ticketing closes in 3-days)

http://go.eventshigh.com/wnako

I will see you all LIVE on 15th June - Till then...happy learning...

Important Note for people looking to switch to UVM - At the end of webinar, you will be given an assignment (a small project). You have to submit the project to earn a certificate from VSD Corp. Pvt. Ltd., which you can use for your upcoming interviews