As promised, after months of dry-run and tough preparations, the webinar is finally here…Its on 15th June – 9am to 1pm (ONLY 50 SEATS)
Here’s the link to registration:
https://www.vlsisystemdesign.com/upcoming-event/
Not mention, with this registration, you are eligible to get one of my 27 online courses for FREE. I will send a google form at the end of webinar where you can drop your FREE course request
Embedded UVM is an opensource implementation of IEEE 1800.2 standard of Universal Verification Methodology. In this webinar, we take a dive into Embedded UVM and its use cases as a platform for Functional Verification and SoC-FPGA based Emulation. We learn how to code Embedded UVM powered testbench for a hardware
accelerator design IP. The test bench is then adapted to Cyclone V and Ultrascale Zynq based platforms to demonstrate Embedded UVM powered low-cost SoC-FPGA based emulation solutions.
About Speaker:
Puneet Goel is a 1994 graduate in Electronics from Punjab Engineering College. He has 24 years of experience in the VLSI industry where he worked for STMicro, Motorola, Texas Instruments and TranSwitch. For the past 8 years, he has been working for Coverify Systems Technology,
where he provides verification services and works on creating viable opensource solutions for chip verification. Puneet is the main developer of Embedded UVM.
All the best and I will see you all LIVE ON 15th June’2019
