As per repeated requests from you and others, I have decided to open a 12-hour window for you to grab each of my course and webinar at 90% discounted price. Here are the links for the same: (Apart from discounts, stay tuned to my further emails for RISC-V workshop updates happening in Chennai)

Note – If you are looking for VLSI basic courses, jump to end of this email….

Webinars:

STA webinar:

https://www.udemy.com/vsd-static-timing-analysis-sta-webinar/?couponCode=12HOUR_WINDOW

Timing ECO webinar:

https://www.udemy.com/vsd-timing-eco-engineering-change-order-webinar/?couponCode=12HOUR_WINDOW

Physical design labs:

https://www.udemy.com/vsd-physical-design-webinar-using-eda-tool-proton/?couponCode=12HOUR_WINDOW

Full chip SOC design and PNR:

https://www.udemy.com/vsd-making-the-raven-chip-how-to-design-a-risc-v-soc/?couponCode=12HOUR_WINDOW

https://www.udemy.com/vsd-soc-design-of-the-picorv32-riscv-micro-processor/?couponCode=12HOUR_WINDOW

Pipelining RSIC-V using TL-verilog:

https://www.udemy.com/vsd-pipelining-risc-v-with-transaction-level-verilog/?couponCode=12HOUR_WINDOW

Machine intelligence in EDA/CAD (hot topic):

https://www.udemy.com/vsd-machine-intelligence-in-eda-cad/?couponCode=12HOUR_WINDOW

RTL synthesis QnA webinar:

https://www.udemy.com/vsd-rtl-synthesis-qa-webinar/?couponCode=12HOUR_WINDOW

Distributed timing analysis:

https://www.udemy.com/vsd-distributed-timing-analysis-within-100-lines-code/?couponCode=12HOUR_WINDOW

Library characterization labs:

https://www.udemy.com/vsd-library-characterization-and-modelling-part-2/?couponCode=12HOUR_WINDOW

RISC-V and TCL related courses (part of “IEEE paper and RISC-V workshop happening in Chennai”)

RISC-V ISA:

https://www.udemy.com/vsd-riscv-instruction-set-architecture-isa-part-1a/?couponCode=12HOUR_WINDOW

https://www.udemy.com/vsd-riscv-instruction-set-architecture-isa-part-1b/?couponCode=12HOUR_WINDOW

TCL Programming: (in huge demand):

https://www.udemy.com/vsd-tcl-programming-from-novice-to-expert/?couponCode=12HOUR_WINDOW

https://www.udemy.com/vsd-tcl-programming-from-novice-to-expert-part-2/?couponCode=12HOUR_WINDOW

Basic VLSI interview related courses:

VLSI interview FAQ’s:

https://www.udemy.com/vlsi-academy/?couponCode=12HOUR_WINDOW

Physical design flow basics:

https://www.udemy.com/vlsi-academy-physical-design-flow/?couponCode=12HOUR_WINDOW

Static timing analysis basics:

https://www.udemy.com/vlsi-academy-sta-checks/?couponCode=12HOUR_WINDOW

https://www.udemy.com/vlsi-academy-sta-checks-2/?couponCode=12HOUR_WINDOW

Custom layout basics:

https://www.udemy.com/vlsi-academy-custom-layout/?couponCode=12HOUR_WINDOW

Clock tree synthesis basics:

https://www.udemy.com/vlsi-academy-clock-tree-synthesis/?couponCode=12HOUR_WINDOW

https://www.udemy.com/vlsi-academy-clock-tree-synthesis-part2/?couponCode=12HOUR_WINDOW

Signal integrity and crosstalk basics:

https://www.udemy.com/vlsi-academy-crosstalk/?couponCode=12HOUR_WINDOW

Circuit design and SPICE simulations basics:

https://www.udemy.com/vlsi-academy-circuit-design/?couponCode=12HOUR_WINDOW

https://www.udemy.com/vlsi-academy-circuit-design-part2/?couponCode=12HOUR_WINDOW

Library characterization basics:

https://www.udemy.com/vlsi-academy-library-characterization-part-1/?couponCode=12HOUR_WINDOW

Stay tuned for my further RISC-V and VSDOpen related emails…

All the best and happy learning…