Hi
Did you know, there are couple of 180nm tape-outs done with below tool already? And we plan to do more. So, in another words, this will be the first open-source fully "integrated" PnR tool for the future. If you have been following me for couple of years, you can trust me
on this...
Why "integrated"? Because at lower nodes, you have to integrate other parts of the flow. Sign-off (you can see power and timing buttons below), synthesis (you can see synthesis button) must be integrated, so we have a fully integrated PnR flow that we built from day one.
To take full advantage of this tool and become a better/different physical design engineer, you would need
to 100% complete all my courses either from below links (valid for next 5 hours only) or from any other sources, starting from physical design.
VLSI and nanotechnology learning can't get more economical than this..
Physical Design:
Clock tree synthesis:
Signal
integrity:
Circuit design and SPICE simulations:
Custom layout:
Static timing analysis (Course supported by University of Illinois):
Library characterization (Industry course supported by
Paripath Corp. Ltd.):
STA webinar:
TCL scripting:
RISC-V ISA (Industry course supported by SiFive):
VLSI - Essential concepts and detailed interview guide:
