Learn to walk before you can run....

Published: Wed, 07/05/17

Hi

I am glad to say, we have walked 500+ videos before we can run through TCL programming course. Frankly, I was involved in scripting since last 10+ years and never found myself back to be a student, to explain TCL in the way you would understand. Thanks to my instinct, I am successfully able to do that, and I am excited to announce that TCL programming – part 2 course will be releasing soon…

Part 2 will mainly focus on how do you convert any format to an EDA tool format, so that its understood by the core engine of EDA tool which produces results. Also, it will focus on, how do you create your own command. We will be taking “read_sdc” command as an example to explain how we created it. Why read_sdc? Dealing with constraints is like dealing with the ‘heart’ of a chip. If you successfully do that, you can achieve any command you need

So, after part-2, you will have your own tool (vsdsynth) for synthesis, you will have industry-like command interface (like read_sdc, read_lib, etc.). Now what else you need to practice and learn core concepts on VLSI. I had been criticized a lot in the past for NOT using industry standard tools. There you go now…you create your own commands, which will be like industry-grade, while I show you how to do so in upcoming part-2 of TCL course

If you love it, you never know, we might just provide students and professionals, a industry level command-line interface, which proves to be useful to implement your own processor (Believe me, this is also coming). So lot of exciting stuffs coming up.

Thanks everyone who have registered to TCL programming course. You must already have started writing and practicing your own scripts. For those who haven’t registered yet, use the below $10 coupon link which is valid till tomorrow, i.e. 6th July 11:59pm IST..Get in soon and experience what others are already experiencing….

In that eve, let me also give away all my other courses for $10, which is, again, valid till tomorrow i.e. 6th July 11:59pm IST..Get in now, before there are any price fluctuations, as it was before…

Static timing analysis:

STA webinar (LIVE):

Library characterization and modelling (Advanced STA):

Custom layout:

Circuit design and SPICE simulations:

Signal integrity:

Clock tree synthesis:

Physical design flow:

VLSI – Essential concepts and detailed interview guide:

All the best..and happy learning…