VLSI interviews or deep concepts - This one covers it all...

Published: Mon, 04/17/17

Hi

Why I say so? While starting to make my course on Library characterization and modelling – Part 1, I thought this would be more for advanced level people in semi-conductor domain or for professionals. Lately, when I started putting videos together in the course, me and few of people who already registered in this course, found out that this is exactly the course to be gone through just a day before your interviews.
Another member pointed out that this is the course which should be done at very beginning or even before starting to learn about other complex topics like signal integrity or clock tree synthesis or static timing analysis
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I reviewed the course and found out they were so right, as this course covers glimpse of physical design flow, static timing analysis, static circuit simulation, dynamic circuit simulations, leakage & switching power concepts, crosstalk glitch & delta delay concepts and basic delay of a cell. Isn’t that all needed to answer all or most of questions in an interview? Plus, you learn theory and lab in the same course. Plus you would know what lies in making of a chip from scratch. I think this course along with another course “VLSI – Essential concepts and detailed interview guide” are good enough for revision in a day or two, and you might just crack the dream interviews. Don’t believe what I say, just experience it by yourself by seeing the contents of both courses. Here are the links:

Library characterization and modelling – Part 1:

VLSI – Essential concepts and detailed interview guide:

Look into below image for glimpse of all topics covered in Library characterization and modelling – Part 1
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Can you see noise glitch, static and dynamic power, library hold time, etc. in the above image? There are images from my Library characterization course. As I said….all in one…..
Furthermore, if you need my other courses for 90% discount (maximum discount anyone can provide), use below links and experience the journey by yourself. I expect you to see in class and interact with you. Till then, happy learning!!

Static timing analysis – Part 1:

Static timing analysis – Part 2:

Custom layout:

Circuit design and SPICE simulations – Part 1:

Circuit design and SPICE simulations – Part 2:

Clock tree synthesis – Part 1:

Clock tree synthesis – Part 2:

Physical design flow:

Signal integrity: