Below are few details
Link to block your seat : http://www.vlsisystemdesign.com/event/first-ever-sta-workshop-using-open-source-tools-in-bangalore/
Payment details and Venue will follow shortly
Workshop overview:
- 50 min of customize video lectures to connect static timing analysis with every step of physical design, like pre-layout timing, placement STA, clock tree synthesis analysis, skew
analysis, post-route timing analysis and sign-off STA
- 50 min of video lectures will also include what different parameters needs to be analyzed other than just setup/hold, and why are they important, like clock gating, IO timing, latch borrow and time given, reset design strategy and many more
- 130min of labs which include analyzing all of above using open-source STA tool “Open-timer” on
LIVE design. Since the tool is open-source, you can always download and revise the entire workshop again and again on your personal laptop.
Workshop details: Pre-requisites:
- Basic Digital design like flipflop and gates working
- Passion to learn
and explore new things, which, in the end, is beneficial for a change in career
Benefits:
- Introduction to Static Timing Analysis and bunch of open-source EDA tools to practice and implement your design right from home
- Participation certificate, which can be attached to your CV
- Constant touch with trainer even after workshop via emails/phone and be the first one to get updates about latest opportunities/internship in semi-conductors.
- An opportunity to partner with trainer for future workshops
- Be the first one to get selected for the next “45-day full fledged training” on RTL-GDS flow (no FEES. Only stipend. So instructor
will hand-pick students for the training)
I am excited to meet you all in person...!!
|
|
|