Hi

I wanted to share a story that perfectly captures the spirit of learning, curiosity, and the power of open-source tools.

Ahtesham, a school student, recently completed an RTL design and synthesis workshop using the SKY130 open-source PDK. He didn’t just stop at writing Verilog code - he simulated it using Icarus Verilog and GTKWave, understood waveform behavior, and synthesized logic using Yosys. Concepts like D flip-flop coding styles, timing libraries, and optimization were no longer theory—they became part of his toolkit.

This isn’t just about one student. It’s a reminder that today, anyone with intent and access to the right tools can begin their journey in chip design. The landscape is changing. What was once reserved for advanced engineering labs is now available to students, hobbyists, and professionals with a laptop and determination.

You can see his work here:
https://github.com/Ahtesham18112011/RTL_workshop/tree/main

If a school student can do this, so can you. It's never too early - or too late—to start designing silicon.

Best regards,
Kunal Ghosh
Founder, VLSI System Design (VSD)