Hi
We’re excited to share how amazed we are at the success and impact of our VSD Hardware Design Programs, now running at scale using a powerful combination of open-source tools and Synopsys industry-grade EDA tools.
Through our two flagship initiatives:
🔹 VSD Hardware Design Program (HDP) – driven by open-source tools like OpenLANE, Magic, and ngspice
🔹 SFAL – Synopsys Foundation
Allied Learning – fully licensed Synopsys flow with Design Compiler, IC Compiler II, PrimeTime, and more
Participants experience the best of both worlds – hands-on RTL-to-GDSII design with full visibility into signoff, simulation, and physical implementation flows.
What’s even better?
We offer most of our workshops completely
free for 10–12 weeks, right up until participants finish their final project. It’s our way of ensuring that learners focus on skill-building and project completion, not just course completion.
We’d love for you to explore how this could benefit your students, teams, or institution.
Warm regards,
Kunal Ghosh
Founder, VLSI System
Design
