Hi
If you’re building or validating chips in 2025, TCL is the glue that turns specs into
repeatable, high-quality flows. This hands-on workshop takes you from a single spreadsheet of design inputs to working SDCs, synthesis runs, quick STA checks, and a clean QoR report—end to end, using production-style TCL.
Why this matters now
- Shrinking schedules + more corners/modes → constraint correctness and flow repeatability are non-negotiable.
- TCL is the control plane across open-source (Yosys/OpenSTA/OpenROAD) and commercial
tools—skills transfer instantly.
- Automations you build here become your team’s horsepower: fewer manual steps, faster ECOs, clearer sign-off.
What you’ll build (step-by-step)
- Spec-to-SDC Generator: Convert a CSV/Excel spec into clean clocks, I/O delays, and exceptions.
- Synthesis Driver: Auto-emit Yosys/DC scripts, run, and sanity-check hierarchy.
- Quick STA Harness: Configure OpenTimer/OpenSTA, run
setup/hold checks, and dump critical paths.
- QoR Dashboard: Aggregate runtime, WNS/TNS proxies, cell counts, and output a shareable report.
Key takeaways
- Practical TCL patterns:
proc, robust arg parsing, file/log I/O, exec + catch, text processing. - Reusable procs for
read_lib, read_sdc, read_verilog, stdout redirection, and run control. - Templates and
checklists you can drop into real projects on Day 1 back at work.
Who should attend
- RTL, Synthesis, STA, and PD engineers; CAD/Flow developers; educators leading VLSI labs.
- Prereqs: basic digital design, shell familiarity; no prior TCL mastery required.
Can this grow into automation engines?
Yes. The same patterns scale to: multi-mode SDC generators, synthesis farm orchestrators, constraints consistency checkers, timing
sanity services, pad-ring assistants, and rule-based ECO recommenders. We’ll show how to modularize your scripts so they become team-ready “mini-apps.”
Logistics
- Format: Live, instructor-led + hands-on labs (5 focused modules).
- Tooling: TCL, Yosys, OpenTimer/OpenSTA (open-source friendly; concepts map to DC/PrimeTime/Innovus).
- Deliverables: Lab scripts, starter repo, checklists, and a certificate of completion.
Ready to level up
your flow?
Register here: https://www.vlsisystemdesign.com/tclworkshop/
Best regards,
The VSD Team
