January 20th, 2024

Today, I started the VLSI System Design Hardware Designing Program (VSD-HDP), a step towards deepening my understanding of VLSI design. Through this blog, I aim to share my experiences and learnings, hoping to inspire others who are curious about this field.

Understanding the Basics: Yosys and OpenSTA

My first task was to install essential tools like Yosys for synthesis and OpenSTA for Static Timing Analysis. The process was straightforward but vital, laying the groundwork for more complex operations ahead.

First Steps: Designing a 7x1 MUX

Early on, I designed a 7x1 MUX using iverilog and gtkwave for simulation. The process of writing RTL, simulating it, and then synthesizing it under Yosys was challenging but rewarding. The joy of seeing my design take shape was unparalleled.

Deeper into Design: Hierarchical and Flat Synthesis

As days progressed, I explored hierarchical and flat synthesis. Understanding the nuances of each approach was like solving a puzzle. The satisfaction of optimizing designs and seeing the efficiency improvements was immense.

Exploring Logic Optimization

I delved into combinational and sequential logic optimization. It was like being a detective, finding and fixing inefficiencies in logic designs. This process not only improved my designs but also sharpened my problem-solving skills.

Facing Challenges: GLS and Synthesis-Simulation Mismatches

I encountered challenges like mismatches between gate-level simulation (GLS) and RTL simulation. Tackling these issues taught me the importance of attention to detail and the intricacies of VLSI design.

Learning Through Doing: Avoiding Latches in Design

One important lesson was about avoiding latches in design. It required a careful balance between the completeness of conditions and the efficiency of the design. This was a practical lesson in the delicate balance of design considerations.

Progressing Further: Introduction to SPICE

The introduction to SPICE and its application in analyzing MOSFETs opened a new window of learning. Simulating transistor characteristics deepened my understanding of the physical aspects of VLSI design.

Advancing Skills: STA with Different PVT Corners

Performing Static Timing Analysis (STA) with different Process-Voltage-Temperature (PVT) corners was like playing chess with nature's variables. It taught me how environmental factors can impact design performance.

Real-World Applications: RISC-V Core
 

Designing a basic RISC-V core was a step closer to real-world applications. It was a test of my accumulated knowledge and skills, and applying them to create something functional was incredibly fulfilling.

Conclusion

As I progress through the VSD-HDP program, each day brings new challenges and learnings. This journey is more than just about acquiring technical knowledge; it's about growth, problem-solving, and the joy of creation. I hope my experiences inspire others to explore the fascinating world of VLSI design.

11th Cohort starts from 20th Jan. Here's the link - https://www.vlsisystemdesign.com/hdp/