Hi

With "vsdsquadron" under safe and capable leadership, it's now the perfect time to expand the reach of RISC-V and VLSI chip design education to even more regions throughout India. Let's empower and equip even more learners with the skills and knowledge to excel in these exciting fields.

We were absolutely inspired by the incredible low-end applications that students have already started building on "vsdsquadron" using RISC-V.

The excitement level goes through the roof when you realize that you can actually view the RTL of the RISC-V processor that lies within "vsdsquadron". What's even more thrilling is that these RISC-V chips onboard have all been constructed using an open-source RTL2GDS toolchain, which has been silicon-proven, making it a true testament to the power of open-source technology.

Get ready for an action-packed ride as we unveil more juicy details about "vsdsquadron"! Stay tuned for an electrifying plan of action to get your hands on this board and take your VLSI/RISC-V learning skills to the next level. Be sure to share your thoughts and stay engaged!

We cannot express our gratitude enough to below exceptional leaders in the open-source community. Without their tireless efforts, this project would not have been possible. Thank you from the bottom of our hearts for your invaluable contributions and unwavering support. We are truly fortunate to have such amazing allies in this journey towards progress and innovation.

Prof. Andrew Kahng | Prof. Dave Patterson | Prof. Kamakoti Veezhinathan | Tim Edwards | Mohamed Kassem | Mike Wishart | Tim Ansell | Steven Kosier | Calista Redmond