The above flyer speaks it all
Hi
Few weeks ago, FOSSEE IIT Bombay conducted PAN India level mixed-signal hackathon jointly with VLSI System Design (VSD) and RedwoodEDA under the leadership Prof. Kannan Moudgalya.
And what an event it was. We received 1800+ registrations all over India and we were surprised to see that 68 participants, who were just in their undergrad, have been selected as Marathon winners. Now, does the outcome look small? Look at it in terms of how many mixed-signal IPs were generated in a span of 3-weeks - its 68 mixed-signal IPs (not only analog, not only
digital)
68 mixed-signal designs in 3 weeks by students of the country - A HUGE number, for any institute or any industry or any organization. Imagine, if we had used real foundry PDKs (coming soon, stay tuned), it would have been 68 silicon ready mixed-signal designs in 3-weeks.
Would really want to Thank Prof. Jan Rabaey from University of California, Berkeley, Ganesh Venkat, Sr. Director Autopilot hardware at Tesla, Mike Wishart from efabless and Dr. Naveed Sherwani from RapidSilicon for accepting our invitation to speak at closing ceremony, motivate students to build
more designs and encourage to Make Hardware Cool Again
If you want to attend the Mixed-signal marathon closing ceremony and hear what marvelous things has been achieved in 3-weeks, fill up this form and we will send you email invites
Closing Ceremony schedule - 6th April, 8pm to 9pm IST
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Thanks & Regards
Kunal P Ghosh
"A pessimist always sees difficulty in every opportunity, An optimist always sees opportunity in every difficulty"
