Hi

 

One of the major areas in VLSI which has massive openings (other than Physical Design) is STA. There is absolute lack of STA engineers in industry and so this workshop is a great opportunity to start looking at STA beyond setup and hold violations.

 

STA is vast and that's where we are in dire need of experts in this are. Here's the registration link (Last 12hours)-

https://www.vlsisystemdesign.com/sign-off-timing-analysis-basics-to-advanced/

 

All the best and happy learning